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DATE
2008
IEEE
131views Hardware» more  DATE 2008»
14 years 2 months ago
Optimal MTCMOS Reactivation Under Power Supply Noise and Performance Constraints
Sleep transistor insertion is one of today’s most promising and widely adopted solutions for controlling stand-by leakage power in nanometer circuits. Although single-cycle powe...
Andrea Calimera, Luca Benini, Enrico Macii
ICASSP
2011
IEEE
12 years 11 months ago
Sparse common spatial patterns in brain computer interface applications
The Common Spatial Pattern (CSP) method is a powerful technique for feature extraction from multichannel neural activity and widely used in brain computer interface (BCI) applicat...
Fikri Goksu, Nuri Firat Ince, Ahmed H. Tewfik
DAC
2009
ACM
14 years 9 days ago
GPU-based parallelization for fast circuit optimization
The progress of GPU (Graphics Processing Unit) technology opens a new avenue for boosting computing power. This work is an attempt to exploit GPU for accelerating VLSI circuit opt...
Yifang Liu, Jiang Hu
TCAD
1998
127views more  TCAD 1998»
13 years 7 months ago
Gate-level power estimation using tagged probabilistic simulation
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
Chih-Shun Ding, Chi-Ying Tsui, Massoud Pedram
ARVLSI
2001
IEEE
305views VLSI» more  ARVLSI 2001»
13 years 11 months ago
Logic Design Considerations for 0.5-Volt CMOS
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
K. Joseph Hass, Jack Venbrux, Prakash Bhatia