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DATE
1999
IEEE
64views Hardware» more  DATE 1999»
14 years 2 months ago
Dynamic Power Management for non-stationary service requests
Dynamic Power Management is a design methodology aiming at reducing power consumption of electronic systems, by performing selective shutdown of the idle system resources. The eff...
Eui-Young Chung, Luca Benini, Alessandro Bogliolo,...
APAL
2005
90views more  APAL 2005»
13 years 9 months ago
Explicit mathematics: power types and overloading
Systems of explicit mathematics provide an axiomatic framework to represent programs and to prove properties of them. We introduce such a system with a new form of power types usi...
Thomas Studer
HPCA
2009
IEEE
14 years 10 months ago
Bridging the computation gap between programmable processors and hardwired accelerators
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...
Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Sco...
ASPLOS
2010
ACM
14 years 4 months ago
Conservation cores: reducing the energy of mature computations
Growing transistor counts, limited power budgets, and the breakdown of voltage scaling are currently conspiring to create a utilization wall that limits the fraction of a chip tha...
Ganesh Venkatesh, Jack Sampson, Nathan Goulding, S...
DAC
2007
ACM
14 years 11 months ago
GlitchMap: An FPGA Technology Mapper for Low Power Considering Glitches
In 90-nm technology, dynamic power is still the largest power source in FPGAs [1], and signal glitches contribute a large portion of the dynamic power consumption. Previous powera...
Lei Cheng, Deming Chen, Martin D. F. Wong