115 search results - page 15 / 23 » On the Design of IEEE Compliant Floating Point Units |
EUROGP
2009
Springer
14 years 10 days ago
2009
Springer
The contribution presented herein proposes an adaptive genetic algorithm applied to quantum logic circuit synthesis that, dynamically adjusts its control parameters. The adaptation...
ARITH
2001
IEEE
13 years 11 months ago
2001
IEEE
We give the results of our search for the worst cases for correct rounding of the major elementary functions in double precision floating-point arithmetic. These results allow the...
MICRO
1998
IEEE
13 years 12 months ago
1998
IEEE
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
ARITH
2009
IEEE
14 years 2 months ago
2009
IEEE
We introduce a novel left-to-right leading digit first dual recoding of an operand for the purpose of designing the squaring operation on that operand. Our dual recoding yields an...
MICRO
1992
IEEE
13 years 11 months ago
1992
IEEE
An important design decision in the implementation of a superscalar processor is the amount of hardware to allocate to the instruction scheduling mechanism. Dynamic scheduling pro...