372 search results - page 32 / 75 » On the Fault Testing for Reversible Circuits |
ICCAD
1997
IEEE
13 years 11 months ago
1997
IEEE
We describe a highly accurate but e cient fault simulator for interconnect opens, based on characterizing the standard cell library with SPICE; using transistor charge equations f...
ITC
2000
IEEE
13 years 12 months ago
2000
IEEE
We present the application of a deterministic logic BIST scheme on state-of-the-art industrial circuits. Experimental results show that complete fault coverage can be achieved for...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
－ We propose a novel oscillation ring (OR) test architecture for testing interconnects in SoC. In addition to stuck-at and open faults, this scheme can detect delay faults and cr...
TCAD
2002
13 years 7 months ago
2002
This paper introduces the concept of hierarchical cellular automata (HCA). The theory of HCA is developed over the Galois extension field (2 ), where each cell of the CA can store ...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
Fault dictionary compaction has been accomplished in the past by removing responses on individual output pins for speci c test vectors. In contrast to the previous work, we presen...