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ESM
1998
13 years 9 months ago
Hardware Modelling and Simulation Using an Object-Oriented Method
In order to reduce the cost, the time-to-market and to make the most pertinent choices, it becomes essential to allow designers to evaluate, very soon in the design phase, a given...
Frédéric Mallet, Fernand Boér...
DAC
2008
ACM
14 years 8 months ago
Symbolic noise analysis approach to computational hardware optimization
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
Arash Ahmadi, Mark Zwolinski
ARC
2008
Springer
104views Hardware» more  ARC 2008»
13 years 9 months ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...
DAC
1994
ACM
13 years 11 months ago
MIST - A Design Aid for Programmable Pipelined Processors
-- In this paper, a tool to aid pipelined processor instruction set implementation is described. The purpose of the tool is to choose from among design alternatives a design that m...
Albert E. Casavant
ICIP
2004
IEEE
14 years 9 months ago
An implemented architecture of deblocking filter for H.264/AVC
H.264/AVC is a new international standard for the compression of natural video images, in which a deblocking filter has been adopted to remove blocking artifacts. In this paper, w...
Bin Sheng, Wen Gao, Di Wu