473 search results - page 72 / 95 » On the Performance of Commit-Time-Locking Based Software Tra... |
104
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CHES
2004
Springer
15 years 8 months ago
2004
Springer
Abstract. A digit-serial, multiplier-accumulator based cryptographic coprocessor architecture is proposed, similar to fix-point DSP's with enhancements, supporting long modula...
134
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LCTRTS
1998
Springer
15 years 7 months ago
1998
Springer
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
137
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ASPLOS
2012
ACM
13 years 11 months ago
2012
ACM
To accomplish frequent, simple tasks with high efficiency, it is necessary to leverage low-power, microcontroller-like processors that are increasingly available on mobile systems...
128
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CASES
2004
ACM
15 years 8 months ago
2004
ACM
ScratchPad Memories (SPMs) are commonly used in embedded systems because they are more energy-efficient than caches and enable tighter application control on the memory hierarchy...
107
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DATE
2009
IEEE
15 years 10 months ago
2009
IEEE
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...