Sciweavers

858 search results - page 29 / 172
» On the Salsa20 Core Function
Sort
View
ETS
2006
IEEE
113views Hardware» more  ETS 2006»
14 years 3 months ago
Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism
This paper proposes a wrapper design for interconnects with guaranteed bandwidth and latency services and on-chip protocol. strate that these interconnects abstract the interconne...
Alexandre M. Amory, Kees Goossens, Erik Jan Marini...
ENTCS
2002
120views more  ENTCS 2002»
13 years 8 months ago
Composition of Distributed Software with Algon - Concepts and Possibilities
The perceived advantages of distributed systems, such as increased reliability and availability, are o set by the increased complexity of developing such applications. The develop...
Judith Bishop, Karen Renaud, Basil Worrall
MICRO
2000
IEEE
129views Hardware» more  MICRO 2000»
13 years 8 months ago
Architectural Considerations for CPU and Network Interface Integration
The popularity of the Internet and the emergence of broadband access networks is fueling the development of communications processors -- devices that integrate processing, network...
Charles D. Cranor, R. Gopalakrishnan, Peter Z. Onu...
VEE
2010
ACM
327views Virtualization» more  VEE 2010»
14 years 4 months ago
AASH: an asymmetry-aware scheduler for hypervisors
Asymmetric multicore processors (AMP) consist of cores exposing the same instruction-set architecture (ISA) but varying in size, frequency, power consumption and performance. AMPs...
Vahid Kazempour, Ali Kamali, Alexandra Fedorova
IAW
2003
IEEE
14 years 2 months ago
Static Verification of Worm and virus Behavior in binary Executables using Model Checking
- Use offormal methods in any application scenario requires a precise characterization and representation of the properties that need to be verified The target, which is desired ri...
Prabhat K. Singh, Arun Lakhotia