This paper presents an architecture for solving generically the problem of extracting the constraints of a given task in a programming by demonstration framework and the problem...
In previous work a DOCSIS model was added to ‘ns’ to allow simulations to be run to analyze the performance of DOCSIS. These simulations showed that congestion caused by the a...
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...
Power reduction during test application is important from the viewpoint of chip reliability and for obtaining correct test results. One of the ways to reduce scan test power is to...
Mohammed ElShoukry, Mohammad Tehranipoor, C. P. Ra...
Abstract— We present a model for the joint design of congestion control and media access control (MAC) for ad hoc wireless networks. Using contention graph and contention matrix,...