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» On the Structure of Low Sets
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ISLPED
1998
ACM
84views Hardware» more  ISLPED 1998»
14 years 1 months ago
Low power architecture of the soft-output Viterbi algorithm
CT This paper investigates the low power implementation issues of the soft-output Viterbi algorithm (SOVA), a building block for turbo codes. By briefly explaining the theory of t...
David Garrett, Mircea R. Stan
ASPDAC
2007
ACM
87views Hardware» more  ASPDAC 2007»
14 years 1 months ago
An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor Compatible with ARM7 Software Tools
- A 16-bit THUMB instruction set microprocessor is proposed for low cost/power in short-precision computing. It achieves 40% gate count, 51% power consumption and 160% clock freque...
Fu-Ching Yang, Ing-Jer Huang
CORR
2010
Springer
92views Education» more  CORR 2010»
13 years 9 months ago
Hardness Results for Agnostically Learning Low-Degree Polynomial Threshold Functions
Hardness results for maximum agreement problems have close connections to hardness results for proper learning in computational learning theory. In this paper we prove two hardnes...
Ilias Diakonikolas, Ryan O'Donnell, Rocco A. Serve...
MICRO
1996
IEEE
129views Hardware» more  MICRO 1996»
14 years 1 months ago
Trace Cache: A Low Latency Approach to High Bandwidth Instruction Fetching
As the issue widthof superscalar processors is increased, instructionfetch bandwidthrequirements will also increase. It will become necessary to fetch multiple basic blocks per cy...
Eric Rotenberg, Steve Bennett, James E. Smith
APCCAS
2006
IEEE
373views Hardware» more  APCCAS 2006»
14 years 23 days ago
A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs
A new low offset dynamic comparator for high resolution high speed analog-to-digital application has been designed. Inputs are reconfigured from the typical differential pair compa...
Vipul Katyal, Randall L. Geiger, Degang Chen