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» On the energy-efficiency of speculative hardware
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ISCAS
2007
IEEE
109views Hardware» more  ISCAS 2007»
14 years 4 months ago
Energy-Efficient Double-Binary Tail-Biting Turbo Decoder Based on Border Metric Encoding
—This paper presents an energy-efficient turbo decoder based on border metric encoding, which is especially suitable for non-binary circular turbo codes. In the proposed method, ...
Ji-Hoon Kim, In-Cheol Park
ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
14 years 2 months ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...
ATS
2004
IEEE
108views Hardware» more  ATS 2004»
14 years 1 months ago
Rapid and Energy-Efficient Testing for Embedded Cores
Conventional serial connection of internal scan chains brings the power and time penalty. A novel parallel core wrapper design (pCWD) approach is presented in this paper for reduc...
Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman ...
FPL
2008
Springer
96views Hardware» more  FPL 2008»
13 years 11 months ago
Towards benchmarking energy efficiency of reconfigurable architectures
Energy research in reconfigurable architectures often involves legacy benchmarks such as the MCNC benchmarks. These benchmarks, however, are not well-suited for assessing energy c...
Tobias Becker, Peter Jamieson, Wayne Luk, Peter Y....
ISLPED
2010
ACM
229views Hardware» more  ISLPED 2010»
13 years 10 months ago
An energy efficient cache design using spin torque transfer (STT) RAM
The on-chip memory is a dominant source of power and energy consumption in modern and future processors. This paper explores the use of a new emerging non-volatile memory technolo...
Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatte...