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VLSID
2002
IEEE
97views VLSI» more  VLSID 2002»
14 years 8 months ago
Multiple Faults: Modeling, Simulation and Test
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
Yong Chang Kim, Vishwani D. Agrawal, Kewal K. Salu...
DAC
2006
ACM
14 years 9 months ago
Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability
- Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-bas...
Jin S. Zhang, Alan Mishchenko, Robert K. Brayton, ...
ECBS
2002
IEEE
81views Hardware» more  ECBS 2002»
14 years 26 days ago
Optimization of a Retargetable Functional Simulator for Embedded Processors
The objective of this research is to develop tools and methods for system-level optimization of embedded software that is executed on system-on-chip platforms. In particular, this...
Francesco Papariello, Gabriele Luculli
JSA
2008
74views more  JSA 2008»
13 years 7 months ago
Resource conflict detection in simulation of function unit pipelines
Processor simulators are important parts of processor design toolsets in which they are used to verify and evaluate the properties of the designed processors. While simulating arch...
Pekka Jääskeläinen, Vladimír...
MASS
2010
150views Communications» more  MASS 2010»
13 years 5 months ago
A non-replication multicasting scheme in delay tolerant networks
Delay tolerant networks (DTNs) are a special type of wireless mobile networks which may lack continuous network connectivity. Multicast is an important routing function that suppor...
Jie Wu, Yunsheng Wang