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ASPLOS
2010
ACM
13 years 10 months ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...
ACSW
2007
13 years 9 months ago
A Privacy Enhancing Mechanism based on Pseudonyms for Identity Protection in Location-Based Services
Over the past years Mobile Business has gained significant progress not only because of higher transfer rates as well as advanced processing power and memory capabilities of netw...
Oliver Jorns, Gerald Quirchmayr, Oliver Jung
HPCA
2006
IEEE
14 years 8 months ago
Phase characterization for power: evaluating control-flow-based and event-counter-based techniques
Computer systems increasingly rely on dynamic, phasebased system management techniques, in which system hardware and software parameters may be altered or tuned at runtime for dif...
Canturk Isci, Margaret Martonosi
ISPAN
2005
IEEE
14 years 1 months ago
Process Scheduling for the Parallel Desktop
Commodity hardware and software are growing increasingly more complex, with advances such as chip heterogeneity and specialization, deeper memory hierarchies, ne-grained power ma...
Eitan Frachtenberg
BMCBI
2010
139views more  BMCBI 2010»
13 years 7 months ago
A highly efficient multi-core algorithm for clustering extremely large datasets
Background: In recent years, the demand for computational power in computational biology has increased due to rapidly growing data sets from microarray and other high-throughput t...
Johann M. Kraus, Hans A. Kestler