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» On two-step routing for FPGAS
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NOCS
2007
IEEE
14 years 1 months ago
NoC-Based FPGA: Architecture and Routing
We present a novel network-on-chip-based architecture for future programmable chips (FPGAs). A key challenge for FPGA design is supporting numerous highly variable design instance...
Roman Gindin, Israel Cidon, Idit Keidar
FPL
2006
Springer
96views Hardware» more  FPL 2006»
13 years 10 months ago
Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding
Interconnect delays are becoming an increasingly significant part of the critical path delay for circuits implemented in FPGAs. Pipelined interconnects have been proposed to addre...
Allan Carroll, Carl Ebeling
IPPS
2003
IEEE
14 years 1 days ago
Evolutionary Fault Recovery in a Virtex FPGA Using a Representation that Incorporates Routing
Most evolutionary approaches to fault recovery in FPGAs focus on evolving alternative logic configurations as opposed to evolving the intra-cell routing. Since the majority of tra...
Jason D. Lohn, Gregory V. Larchev, Ronald F. DeMar...
DAC
2002
ACM
14 years 7 months ago
River PLAs: a regular circuit structure
A regular circuit structure called a River PLA and its reconfigurable version, Glacier PLA, are presented. River PLAs provide greater regularity than circuits implemented with sta...
Fan Mo, Robert K. Brayton
ICMCS
2006
IEEE
101views Multimedia» more  ICMCS 2006»
14 years 24 days ago
Internet Traffic Classification for Scalable QOS Provision
A new scheme that classifies the Internet traffic according to their application types for scalable QoS provision is proposed in this work. The traditional port-based classific...
Junghun Park, Hsiao-Rong Tyan, C. C. Jay Kuo