16 search results - page 2 / 4 » On-chip communication architecture exploration for processor... |
170
click to vote
VLSID
2008
IEEE
16 years 6 days ago
2008
IEEE
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
161
click to vote
ASPDAC
2006
ACM
15 years 11 months ago
2006
ACM
– Modern multi-processor system-on-chip (MPSoC) designs have high bandwidth constraints which must be satisfied by the underlying communication architecture. Bus matrix based com...
169
click to vote
ICCD
2006
IEEE
16 years 2 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
198
click to vote
DAC
2006
ACM
15 years 7 months ago
2006
ACM
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
159
click to vote
DATE
2009
IEEE
16 years 17 days ago
2009
IEEE
In this paper, a novel design space exploration approach is proposed that enables a concurrent optimization of the topology, the process binding, and the communication routing of ...