45 search results - page 7 / 9 » On-chip implementation of multiprocessor networks and switch... |
INFOCOM
1995
IEEE
13 years 11 months ago
1995
IEEE
Message-based process architectures are widely regarded as an effective method for structuring parallel protocol processing on shared memory multi-processor platforms. A message-b...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
ASPDAC
2000
ACM
13 years 12 months ago
2000
ACM
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
NSDI
2010
13 years 9 months ago
2010
Today's data centers offer tremendous aggregate bandwidth to clusters of tens of thousands of machines. However, because of limited port densities in even the highest-end swi...