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TCAD
2010
160views more  TCAD 2010»
13 years 2 months ago
SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips
Three-dimensional integrated circuits (3D-ICs) are a promising approach to address the integration challenges faced by current systems on chips (SoCs). Designing an efficient netwo...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
ICCAD
2008
IEEE
80views Hardware» more  ICCAD 2008»
14 years 4 months ago
Advancing supercomputer performance through interconnection topology synthesis
—In today’s many-core era, the interconnection networks have been the key factor that dominates the performance of a computer system. In this paper, we propose a design flow t...
Yi Zhu, Michael Taylor, Scott B. Baden, Chung-Kuan...
ISQED
2007
IEEE
127views Hardware» more  ISQED 2007»
14 years 2 months ago
Sensitivity Based Link Insertion for Variation Tolerant Clock Network Synthesis
Clock distribution is one of the key limiting factors in any high speed, sub-100nm VLSI design. Unwanted clock skews, caused by variation effects like manufacturing variations, po...
Joon-Sung Yang, Anand Rajaram, Ninghy Shi, Jian Ch...