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» Operating Systems for FPGA Based Computers and Their Memory
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ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
13 years 8 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
CCECE
2006
IEEE
14 years 2 months ago
A Dynamic Associative E-Learning Model based on a Spreading Activation Network
Presenting information to an e-learning environment is a challenge, mostly, because ofthe hypertextlhypermedia nature and the richness ofthe context and information provides. This...
Phongchai Nilas, Nilamit Nilas, Somsak Mitatha
IPPS
1998
IEEE
14 years 13 days ago
Eliminating the Protocol Stack for Socket Based Communication in Shared Memory Interconnects
We show how the traditional protocol stack, such as TCP/IP, can be eliminated for socket based high speed communication within a cluster. The SCI shared memory interconnect is used...
Stein Jørgen Ryan, Haakon Bryhni
CCGRID
2006
IEEE
14 years 2 months ago
Proposal of MPI Operation Level Checkpoint/Rollback and One Implementation
With the increasing number of processors in modern HPC(High Performance Computing) systems, there are two emergent problems to solve. One is scalability, the other is fault tolera...
Yuan Tang, Graham E. Fagg, Jack Dongarra
DAC
2001
ACM
14 years 9 months ago
Concurrent Error Detection of Fault-Based Side-Channel Cryptanalysis of 128-Bit Symmetric Block Ciphers
: Fault-based side channel cryptanalysis is very effective against symmetric and asymmetric encryption algorithms. Although straightforward hardware and time redundancy based concu...
Ramesh Karri, Kaijie Wu, Piyush Mishra, Yongkook K...