26 search results - page 5 / 6 » Optimal Clock Skew Scheduling Tolerant to Process Variations |
DAC
2010
ACM
13 years 9 months ago
2010
ACM
Clock meshes are extremely effective at filtering clock skew from environmental and process variations. For this reason, clock meshes are used in most high performance designs. Ho...
TVLSI
2010
13 years 5 months ago
2010
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...
SIPS
2006
IEEE
14 years 4 months ago
2006
IEEE
Abstract— This paper is interested in applying voltage overscaling (VOS) to reduce trellis decoder energy consumption, where the key issue is how to minimize the decoding perform...
PATMOS
2007
Springer
14 years 5 months ago
2007
Springer
Abstract. The continuous miniaturization of semiconductor devices imposes serious threats to design robustness against process variations and environmental fluctuations. Modern ci...
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...