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» Optimal Control Using Bisimulations: Implementation
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FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 2 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
MICRO
2006
IEEE
117views Hardware» more  MICRO 2006»
14 years 2 months ago
PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection
Dynamic software bug detection tools are commonly used because they leverage run-time information. However, they suffer from a fundamental limitation, the Path Coverage Problem: t...
Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou, Josep T...
SIGOPSE
2004
ACM
14 years 1 months ago
Defending against eclipse attacks on overlay networks
Overlay networks are widely used to deploy functionality at edge nodes without changing network routers. Each node in an overlay network maintains pointers to a set of neighbor no...
Atul Singh, Miguel Castro, Peter Druschel, Antony ...
SPAA
2003
ACM
14 years 1 months ago
The effect of communication costs in solid-state quantum computing architectures
Quantum computation has become an intriguing technology with which to attack difficult problems and to enhance system security. Quantum algorithms, however, have been analyzed un...
Dean Copsey, Mark Oskin, Tzvetan S. Metodi, Freder...
CN
2008
80views more  CN 2008»
13 years 8 months ago
Practical large-scale latency estimation
We present the implementation of a large-scale latency estimation system based on GNP and incorporated into the Google content delivery network. Our implementation does not rely o...
Michal Szymaniak, David L. Presotto, Guillaume Pie...