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» Optimal Hardware Pattern Generation for Functional BIST
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DATE
2007
IEEE
94views Hardware» more  DATE 2007»
14 years 19 days ago
Optimization-based wideband basis functions for efficient interconnect extraction
This paper introduces a technique for the numerical generation of basis functions that are capable of parameterizing the frequency-variant nature of cross-sectional conductor curre...
Xin Hu, Tarek Moselhy, Jacob K. White, Luca Daniel
ICCD
2006
IEEE
131views Hardware» more  ICCD 2006»
14 years 5 months ago
Power-Constrained SOC Test Schedules through Utilization of Functional Buses
— In this paper, we are proposing a core-based test methodology that utilizes the functional bus for test stimuli and response transportation. An efficient algorithm for the gen...
Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orail...
GECCO
2004
Springer
135views Optimization» more  GECCO 2004»
14 years 2 months ago
CellNet Co-Ev: Evolving Better Pattern Recognizers Using Competitive Co-evolution
A model for the co-evolution of patterns and classifiers is presented. The CellNet system for generating binary classifiers is used as a base for experimentation. The CellNet syste...
Taras Kowaliw, Nawwaf N. Kharma, Chris Jensen, Hus...
GECCO
2007
Springer
182views Optimization» more  GECCO 2007»
14 years 2 months ago
Generating large-scale neural networks through discovering geometric regularities
Connectivity patterns in biological brains exhibit many repeating motifs. This repetition mirrors inherent geometric regularities in the physical world. For example, stimuli that ...
Jason Gauci, Kenneth O. Stanley
CASES
2007
ACM
14 years 21 days ago
Compiler generation from structural architecture descriptions
With increasing complexity of modern embedded systems, the availability of highly optimizing compilers becomes more and more important. At the same time, application specific inst...
Florian Brandner, Dietmar Ebner, Andreas Krall