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CHES
2007
Springer
136views Cryptology» more  CHES 2007»
14 years 4 months ago
CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method
The hardness of the integer factorization problem assures the security of some public-key cryptosystems including RSA, and the number field sieve method (NFS), the most efficient ...
Tetsuya Izu, Jun Kogure, Takeshi Shimoyama
GLOBECOM
2006
IEEE
14 years 4 months ago
A Game Theoretic Approach to Detect Network Intrusions: The Cooperative Intruders Scenario
Abstract— In this paper, we consider the problem of detecting intrusions initiated by cooperative malicious nodes in infrastructure-based networks. We achieve this objective by s...
Mona Mehrandish, Hadi Otrok, Mourad Debbabi, Chadi...
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
14 years 4 months ago
Fine-grain thermal profiling and sensor insertion for FPGAs
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci...
WIOPT
2006
IEEE
14 years 4 months ago
Connection-level QoS provisioning in multiple transmission technology-based OFDM system
A state-of-the-art orthogonal frequency division multiplexing (OFDM)-based access system, such as the DiffSeg system [1][2], uses a different set of transmission technologies, e.g...
Youngkyu Choi, Sunghyun Choi, Sung-Pil Hong
ASPDAC
2006
ACM
110views Hardware» more  ASPDAC 2006»
14 years 4 months ago
Switching-activity driven gate sizing and Vth assignment for low power design
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...
Yu-Hui Huang, Po-Yuan Chen, TingTing Hwang