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ICCAD
1998
IEEE
101views Hardware» more  ICCAD 1998»
14 years 2 months ago
Wireplanning in logic synthesis
In this paper, we propose a new logic synthesis methodology to deal with the increasing importance of the interconnect delay in deepsubmicron technologies. We first show that conv...
Wilsin Gosti, Amit Narayan, Robert K. Brayton, Alb...
ASPDAC
1998
ACM
160views Hardware» more  ASPDAC 1998»
14 years 2 months ago
Synthesis of Power Efficient Systems-on-Silicon
We developed a new modular synthesis approach for design of low-power core-based data-intensive application-specific systems on silicon. The power optimization is conducted in th...
Darko Kirovski, Chunho Lee, Miodrag Potkonjak, Wil...
DAC
1997
ACM
14 years 2 months ago
Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
Howard H. Chen, David D. Ling
ICDE
1994
IEEE
140views Database» more  ICDE 1994»
14 years 2 months ago
Mariposa: A New Architecture for Distributed Data
We describe the design of Mariposa, an experimental distributed data management system that provides high performance in an environment of high data mobility and heterogeneous hos...
Michael Stonebraker, Paul M. Aoki, Robert Devine, ...
DAC
1989
ACM
14 years 2 months ago
Fast Hypergraph Partition
We present a new 0 (n2) heuristic for hypergraph min-cut bipartitioning, an important problem in circuit placement. Fastest previous methods for this problem are O(n2 log n). Our ...
Andrew B. Kahng