43 search results - page 2 / 9 » Optimal Supply and Threshold Scaling for Subthreshold CMOS C... |
GLVLSI
2005
IEEE
14 years 4 months ago
2005
IEEE
We present simulations for ultra-thin body, fully-depleted, double-gate (DG) silicon-on-insulator (SOI) devices that can be readily optimized for both static power loss and perfor...
ASPDAC
2007
ACM
14 years 2 months ago
2007
ACM
Power gating has been widely used to reduce subthreshold leakage. However, its efficiency degrades very fast with technology scaling due to the gate leakage of circuits specific t...
ISQED
2007
IEEE
14 years 5 months ago
2007
IEEE
Straining of silicon improves mobility of carriers resulting in speed enhancement for transistors in CMOS technology. Traditionally, silicon straining is applied in a similar ad-h...
TIM
2010
13 years 5 months ago
2010
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
ARVLSI
2001
IEEE
14 years 2 months ago
2001
IEEE
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...