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» Optimal Vector Selection for Low Power BIST
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DATE
2009
IEEE
135views Hardware» more  DATE 2009»
14 years 2 months ago
Gate replacement techniques for simultaneous leakage and aging optimization
—1As technology scales, the aging effect caused by Negative Bias Temperature Instability (NBTI) has become a major reliability concern for circuit designers. On the other hand, r...
Yu Wang 0002, Xiaoming Chen, Wenping Wang, Yu Cao,...
SIGMOD
1999
ACM
110views Database» more  SIGMOD 1999»
13 years 12 months ago
Multi-dimensional Selectivity Estimation Using Compressed Histogram Information
The database query optimizer requires the estimation of the query selectivity to find the most efficient access plan. For queries referencing multiple attributes from the same rel...
Ju-Hong Lee, Deok-Hwan Kim, Chin-Wan Chung
GECCO
2007
Springer
155views Optimization» more  GECCO 2007»
14 years 1 months ago
Differential evolution and non-separability: using selective pressure to focus search
Recent results show that the Differential Evolution algorithm has significant difficulty on functions that are not linearly separable. On such functions, the algorithm must rely...
Andrew M. Sutton, Monte Lunacek, L. Darrell Whitle...
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
14 years 27 days ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
DAC
1999
ACM
14 years 8 months ago
Power Efficient Mediaprocessors: Design Space Exploration
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
Johnson Kin, Chunho Lee, William H. Mangione-Smith...