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» Optimal instruction scheduling using integer programming
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ICCAD
2004
IEEE
127views Hardware» more  ICCAD 2004»
14 years 6 months ago
A yield improvement methodology using pre- and post-silicon statistical clock scheduling
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Pin...
ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
14 years 4 months ago
ILP Based Gate Leakage Optimization Using DKCMOS Library during RTL Synthesis
In this paper dual-K (DKCMOS) technology is proposed as a method for gate leakage power reduction. An integer linear programming (ILP) based algorithm is proposed for its optimiza...
Saraju P. Mohanty
HIPC
2000
Springer
14 years 1 months ago
Improving Offset Assignment on Embedded Processors Using Transformations
Embedded systems consisting of the application program ROM, RAM, the embedded processor core and any custom hardware on a single wafer are becoming increasingly common in areas suc...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
ATMOS
2007
163views Optimization» more  ATMOS 2007»
13 years 11 months ago
Branching Strategies to Improve Regularity of Crew Schedules in Ex-Urban Public Transit
We discuss timetables in ex-urban bus traffic that consist of many trips serviced every day together with some exceptions that do not repeat daily. Traditional optimization methods...
Ingmar Steinzen, Leena Suhl, Natalia Kliewer
PARA
2004
Springer
14 years 3 months ago
Cache Optimizations for Iterative Numerical Codes Aware of Hardware Prefetching
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
Josef Weidendorfer, Carsten Trinitis