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MICRO
2002
IEEE
97views Hardware» more  MICRO 2002»
14 years 3 months ago
Three extensions to register integration
Register integration (or just integration) is a register renaming discipline that implements instruction reuse via physical register sharing. Initially developed to perform squash...
Vlad Petric, Anne Bracy, Amir Roth
VTS
2002
IEEE
126views Hardware» more  VTS 2002»
14 years 2 months ago
On Using Rectangle Packing for SOC Wrapper/TAM Co-Optimization
The testing time for a system-on-chip (SOC) is determined to a large extent by the design of test wrappers and the test access mechanism (TAM). Wrapper/TAM co-optimization is ther...
Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan M...
DATE
2004
IEEE
175views Hardware» more  DATE 2004»
14 years 1 months ago
Breaking Instance-Independent Symmetries in Exact Graph Coloring
Code optimization and high level synthesis can be posed as constraint satisfaction and optimization problems, such as graph coloring used in register allocation. Graph coloring is...
Arathi Ramani, Fadi A. Aloul, Igor L. Markov, Kare...
DAC
1994
ACM
14 years 2 months ago
MIST - A Design Aid for Programmable Pipelined Processors
-- In this paper, a tool to aid pipelined processor instruction set implementation is described. The purpose of the tool is to choose from among design alternatives a design that m...
Albert E. Casavant
SAMOS
2010
Springer
13 years 8 months ago
Programming multi-core architectures using Data-Flow techniques
Abstract—In this paper we present a Multithreaded programming methodology for multi-core systems that utilizes DataFlow concurrency. The programmer augments the program with macr...
Samer Arandi, Paraskevas Evripidou