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» Optimal integrated code generation for VLIW architectures
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ARITH
2009
IEEE
14 years 3 months ago
Datapath Synthesis for Standard-Cell Design
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation. Numerous ar...
Reto Zimmermann
AADEBUG
2005
Springer
14 years 2 months ago
Tdb: a source-level debugger for dynamically translated programs
Debugging techniques have evolved over the years in response to changes in programming languages, implementation techniques, and user needs. A new type of implementation vehicle f...
Naveen Kumar, Bruce R. Childers, Mary Lou Soffa
MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
14 years 1 months ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...
EUROGP
2003
Springer
101views Optimization» more  EUROGP 2003»
14 years 1 months ago
An Enhanced Framework for Microprocessor Test-Program Generation
Test programs are fragment of code, but, unlike ordinary application programs, they are not intended to solve a problem, nor to calculate a function. Instead, they are supposed to ...
Fulvio Corno, Giovanni Squillero
IJWET
2006
163views more  IJWET 2006»
13 years 8 months ago
A CASE tool for modelling and automatically generating web service-enabled applications
: This paper presents a CASE tool for the high-level specification of web applications integrated with web services. The CASE tool is based on WebML, a conceptual modelling languag...
Marco Brambilla, Stefano Ceri, Sara Comai, Piero F...