711 search results - page 67 / 143 » Optimal placement by branch-and-price |
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
ICCAD
1991
IEEE
13 years 11 months ago
1991
IEEE
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
EOR
2007
13 years 7 months ago
2007
In a recent paper, Savas, Batta and Nagi [14] consider the optimal placement of a finite-sized facility in the presence of arbitrarily-shaped barriers under rectilinear travel. T...
ISCA
1998
IEEE
14 years 4 days ago
1998
IEEE
This paper investigates the placement of data and parity on redundant disk arrays. Declustered organizations have been traditionally used to achieve fast reconstruction of a faile...