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SASP
2008
IEEE
140views Hardware» more  SASP 2008»
14 years 2 months ago
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
— Matrix inversion is a common function found in many algorithms used in wireless communication systems. As FPGAs become an increasingly attractive platform for wireless communic...
Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan ...
DATE
2009
IEEE
151views Hardware» more  DATE 2009»
14 years 2 months ago
Combined system synthesis and communication architecture exploration for MPSoCs
In this paper, a novel design space exploration approach is proposed that enables a concurrent optimization of the topology, the process binding, and the communication routing of ...
Martin Lukasiewycz, Martin Streubühr, Michael...
ICCD
2008
IEEE
120views Hardware» more  ICCD 2008»
14 years 4 months ago
Near-optimal oblivious routing on three-dimensional mesh networks
— The increasing viability of three dimensional (3D) silicon integration technology has opened new opportunities for chip architecture innovations. One direction is in the extens...
Rohit Sunkam Ramanujam, Bill Lin
DAC
2007
ACM
13 years 11 months ago
Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies
This paper presents MOJITO, a system which optimizes across thousands of analog circuit topologies simultaneously, and returns a set of sized topologies that collectively provide ...
Trent McConaghy, Pieter Palmers, Georges G. E. Gie...
DATE
2006
IEEE
135views Hardware» more  DATE 2006»
14 years 1 months ago
FPGA architecture characterization for system level performance analysis
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
Douglas Densmore, Adam Donlin, Alberto L. Sangiova...