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» Optimistic parallelism benefits from data partitioning
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DAC
2003
ACM
14 years 8 months ago
On-chip logic minimization
While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
Roman L. Lysecky, Frank Vahid
JPDC
2006
146views more  JPDC 2006»
13 years 7 months ago
A semi-static approach to mapping dynamic iterative tasks onto heterogeneous computing systems
Minimization of the execution time of an iterative application in a heterogeneous parallel computing environment requires an appropriate mapping scheme for matching and scheduling...
Yu-Kwong Kwok, Anthony A. Maciejewski, Howard Jay ...
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
14 years 4 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
CLOUD
2010
ACM
14 years 19 days ago
Fluxo: a system for internet service programming by non-expert developers
Over the last 10–15 years, our industry has developed and deployed many large-scale Internet services, from e-commerce to social networking sites, all facing common challenges i...
Emre Kiciman, V. Benjamin Livshits, Madanlal Musuv...
CAL
2008
13 years 7 months ago
BENoC: A Bus-Enhanced Network on-Chip for a Power Efficient CMP
Network-on-Chips (NoCs) outperform buses in terms of scalability, parallelism and system modularity and therefore are considered as the main interconnect infrastructure in future c...
I. Walter, Israel Cidon, Avinoam Kolodny