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DAC
1998
ACM
15 years 8 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
DSN
2009
IEEE
15 years 11 months ago
Maximizing system lifetime by battery scheduling
The use of mobile devices is limited by the battery lifetime. Some devices have the option to connect an extra battery, or to use smart battery-packs with multiple cells to extend...
Marijn R. Jongerden, Boudewijn R. Haverkort, Henri...
DATE
2008
IEEE
114views Hardware» more  DATE 2008»
15 years 11 months ago
Synthesis of Fault-Tolerant Embedded Systems
This work addresses the issue of design optimization for faulttolerant hard real-time systems. In particular, our focus is on the handling of transient faults using both checkpoin...
Petru Eles, Viacheslav Izosimov, Paul Pop, Zebo Pe...
CODES
2006
IEEE
15 years 10 months ago
The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications
Modern embedded systems for image processing involve increasingly complex levels of functionality under real-time and resourcerelated constraints. As this complexity increases, th...
Dong-Ik Ko, Shuvra S. Bhattacharyya
VCIP
2003
132views Communications» more  VCIP 2003»
15 years 5 months ago
Layered self-identifiable and scalable video codec for delivery to heterogeneous receivers
This paper describes the development of a layered structure of a multi-resolutional scalable video codec based on the Color Set Partitioning in Hierarchical Trees (CSPIHT) scheme....
Wei Feng, Ashraf A. Kassim, Chen-Khong Tham