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» Optimization of Linear Logic Programs Using Counting Methods
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CGO
2004
IEEE
13 years 11 months ago
Optimizing Translation Out of SSA Using Renaming Constraints
Static Single Assignment form is an intermediate representation that uses instructions to merge values at each confluent point of the control flow graph. instructions are not ma...
Fabrice Rastello, François de Ferriè...
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 4 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
ASPDAC
2007
ACM
119views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng,...
CDC
2009
IEEE
137views Control Systems» more  CDC 2009»
14 years 10 days ago
Kernel regression for travel time estimation via convex optimization
—We develop an algorithm aimed at estimating travel time on segments of a road network using a convex optimization framework. Sampled travel time from probe vehicles are assumed ...
Sebastien Blandin, Laurent El Ghaoui, Alexandre M....
CGO
2008
IEEE
14 years 2 months ago
Fast liveness checking for ssa-form programs
Liveness analysis is an important analysis in optimizing compilers. Liveness information is used in several optimizations and is mandatory during the code-generation phase. Two dr...
Benoit Boissinot, Sebastian Hack, Daniel Grund, Be...