92 search results - page 10 / 19 » Optimization of shield structures in analog integrated circu... |
CLEIEJ
2010
13 years 5 months ago
2010
A 3D circuit is the stacking of regular 2D circuits. The advances on the fabrication and packaging technologies allowed interconnecting stacked 2D circuits by using 3D vias. Howeve...
MICRO
2008
IEEE
14 years 2 months ago
2008
IEEE
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
IPSN
2007
Springer
14 years 1 months ago
2007
Springer
— Existing sensor network architectures are based on the assumption that data will be polled. Therefore, they are not adequate for long-term battery-powered use in applications t...
GLVLSI
2009
IEEE
14 years 2 months ago
2009
IEEE
The interconnection delay of pre-fabricated design style dominates circuit delay due to the heavily downstream capacitance. Buffer insertion is a widely used technique to split o...
ISPD
2004
ACM
14 years 1 months ago
2004
ACM
This paper presents an efficient method for optimizing the design of power/ground (P/G) networks by using locally regular, globally irregular grids. The procedure divides the pow...