Multiplicative general parameter (MGP) approach to finite impulse response (FIR) filtering introduces a novel way to realize cost effective adaptive filters in compact very large s...
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
The paper presents several improvements to state-of-theart in FPGA technology mapping exemplified by a recent advanced technology mapper DAOmap [Chen and Cong, ICCAD `04]. Improve...
Alan Mishchenko, Satrajit Chatterjee, Robert K. Br...