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» Optimizations for LTL Synthesis
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JGO
2011
89views more  JGO 2011»
14 years 6 months ago
Model building using bi-level optimization
Abstract In many problems from different disciplines such as engineering, physics, medicine, and biology, a series of experimental data is used in order to generate a model that ca...
Georges K. Saharidis, Ioannis P. Androulakis, Mari...
CVPR
2001
IEEE
16 years 6 months ago
Optimal Texture Map Reconstruction from Multiple Views
The recovery of 3D models from multiple reference images involves not only the extraction of 3D shape, but also of texture. Assuming that all surfaces are Lambertian, the resultin...
Lifeng Wang, Sing Bing Kang, Richard Szeliski, Heu...
DAC
2005
ACM
16 years 5 months ago
MiniBit: bit-width optimization via affine arithmetic
MiniBit, our automated approach for optimizing bit-widths of fixed-point designs is based on static analysis via affine arithmetic. We describe methods to minimize both the intege...
Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayn...
DATE
2006
IEEE
124views Hardware» more  DATE 2006»
15 years 10 months ago
Timing-driven cell layout de-compaction for yield optimization by critical area minimization
This paper proposes a yield optimization method for standard-cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield-enhanced standard ...
Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada
ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
15 years 9 months ago
Register binding and port assignment for multiplexer optimization
- Data path connection elements, such as multiplexers, consume a significant amount of area on a VLSI chip, especially for FPGA designs. Multiplexer optimization is a difficult pro...
Deming Chen, Jason Cong