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» Optimized integration of test compression and sharing for SO...
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DATE
2007
IEEE
106views Hardware» more  DATE 2007»
14 years 1 months ago
Optimized integration of test compression and sharing for SOC testing
1 The increasing test data volume needed to test core-based System-on-Chip contributes to long test application times (TAT) and huge automatic test equipment (ATE) memory requireme...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
14 years 1 months ago
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
DATE
2007
IEEE
100views Hardware» more  DATE 2007»
14 years 1 months ago
SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling
Abstract— We present an SoC testing approach that integrates test data compression, TAM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as ...
Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon W...
DATE
2003
IEEE
76views Hardware» more  DATE 2003»
14 years 22 days ago
A Unified Approach for SOC Testing Using Test Data Compression and TAM Optimization
Vikram Iyengar, Anshuman Chandra, Sharon Schweizer...
DATE
2003
IEEE
96views Hardware» more  DATE 2003»
14 years 22 days ago
Test Data Compression: The System Integrator's Perspective
Test data compression (TDC) is a promising low-cost methodology for System-on-a-Chip (SOC) test. This is due to the fact that it can reduce not only the volume of test data but al...
Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola N...