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EUROPAR
2010
Springer
13 years 7 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...
DATE
2009
IEEE
151views Hardware» more  DATE 2009»
14 years 2 months ago
Combined system synthesis and communication architecture exploration for MPSoCs
In this paper, a novel design space exploration approach is proposed that enables a concurrent optimization of the topology, the process binding, and the communication routing of ...
Martin Lukasiewycz, Martin Streubühr, Michael...
PASTE
1998
ACM
13 years 11 months ago
OPTVIEW: A New Approach for Examining Optimized Code
The task of mappingbetween source programs and machine code, once the code has been optimizedand transformed by a compiler is often di cult. Yet there are many instances, such as ...
Caroline Tice, Susan L. Graham
ICCV
2009
IEEE
13 years 5 months ago
Fast realistic multi-action recognition using mined dense spatio-temporal features
Within the field of action recognition, features and descriptors are often engineered to be sparse and invariant to transformation. While sparsity makes the problem tractable, it ...
Andrew Gilbert, John Illingworth, Richard Bowden
ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
14 years 9 days ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock