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MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
15 years 10 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
ICMCS
2006
IEEE
153views Multimedia» more  ICMCS 2006»
15 years 10 months ago
RESP: Shortest-Path-Based Cache Replacement in a Transcoding Proxy
In this paper, we discuss the cache replacement policy in a multimedia transcoding proxy. Unlike the cache replacement for conventional web objects, to replace some elements with ...
Hao-Ping Hung, Ming-Syan Chen
COLOGNETWENTE
2010
15 years 2 months ago
Bisimplicial Edges in Bipartite Graphs
Bisimplicial edges in bipartite graphs are closely related to pivots in Gaussian elimination that avoid turning zeroes into non-zeroes. We present a new deterministic algorithm to...
Matthijs Bomhoff, Bodo Manthey
CASES
2007
ACM
15 years 8 months ago
A low power front-end for embedded processors using a block-aware instruction set
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...
Ahmad Zmily, Christos Kozyrakis
TPDS
1998
157views more  TPDS 1998»
15 years 4 months ago
A Compiler Optimization Algorithm for Shared-Memory Multiprocessors
This paper presents a new compiler optimization algorithm that parallelizes applications for symmetric, sharedmemory multiprocessors. The algorithm considers data locality, parall...
Kathryn S. McKinley