244 search results - page 20 / 49 » Optimizing Loop Performance for Clustered VLIW Architectures |
EUROPAR
2004
Springer
14 years 1 months ago
2004
Springer
Several optimization techniques are hindered by uncertainties about the control flow in a program, which can generally not be determined by static methods at compile time. We pres...
CASES
2007
ACM
13 years 9 months ago
2007
ACM
Aggressive compiler optimizations such as software pipelining and loop invariant code motion can significantly improve application performance, but these transformations often re...
ISCAS
2008
IEEE
14 years 2 months ago
2008
IEEE
— An extended version of sturdy MASH delta-sigma modulators is presented in this paper. Improved performance is achieved using in-band zero optimization. The challenges towards h...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Reconfigurable Architectures are good candidates for application accelerators that cannot be set in stone at production time. FPGAs however, often suffer from the area and perfor...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Power control is becoming a key challenge for effectively operating a modern data center. In addition to reducing operating costs, precisely controlling power consumption is an es...