Sciweavers

363 search results - page 4 / 73
» Optimizing Memory Accesses For Spatial Computation
Sort
View
DAC
2004
ACM
14 years 8 months ago
Memory access scheduling and binding considering energy minimization in multi-bank memory systems
Memory-related activity is one of the major sources of energy consumption in embedded systems. Many types of memories used in embedded systems allow multiple operating modes (e.g....
Chun-Gi Lyuh, Taewhan Kim
ISCA
1995
IEEE
93views Hardware» more  ISCA 1995»
13 years 11 months ago
Optimizing Memory System Performance for Communication in Parallel Computers
Communicationin aparallel systemfrequently involvesmoving data from the memory of one node to the memory of another; this is the standard communication model employedin message pa...
Thomas Stricker, Thomas R. Gross
CHI
2002
ACM
14 years 8 months ago
Kinesthetic cues aid spatial memory
We are interested in building and evaluating human computer interfaces that make information more memorable. Psychology research informs us that humans access memories through cue...
Desney S. Tan, Randy F. Pausch, Jeanine Stefanucci...
HPCA
2012
IEEE
12 years 3 months ago
Balancing DRAM locality and parallelism in shared memory CMP systems
Modern memory systems rely on spatial locality to provide high bandwidth while minimizing memory device power and cost. The trend of increasing the number of cores that share memo...
Min Kyu Jeong, Doe Hyun Yoon, Dam Sunwoo, Mike Sul...
ISVLSI
2005
IEEE
69views VLSI» more  ISVLSI 2005»
14 years 1 months ago
Pipelined Memory Controllers for DSP Applications Handling Unpredictable Data Accesses
Multimedia applications are often characterized by a large number of data accesses with regular and periodic access patterns. In these cases, optimized pipelined memory access con...
Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet, E...