1912 search results - page 124 / 383 » Optimizing interconnection policies |
115
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DAC
2005
ACM
16 years 4 months ago
2005
ACM
This paper presents a novel repeater insertion algorithm for the power minimization of realistic interconnect trees under given timing budgets. Our algorithm judiciously combines ...
119
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VLSID
2005
IEEE
16 years 4 months ago
2005
IEEE
Buffer insertion method plays a great role in modern VLSI design. Many buffer insertion algorithms have been proposed in recent years. However, most of them used simplified delay ...
133
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ICCAD
2002
IEEE
16 years 15 days ago
2002
IEEE
As the scale of system integration continues to grow, the on-chip communication becomes the ultimate bottleneck of system performance and the primary determinant of system archite...
98
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ICCAD
2001
IEEE
16 years 15 days ago
2001
IEEE
In deep submicron VLSI circuits, interconnect reliability due to electromigration and thermal effects is fast becoming a serious design issue particularly for long signal lines. T...
152
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ISCA
2008
IEEE
15 years 10 months ago
2008
IEEE
As the number of cores per die increases, be they processors, memory blocks, or custom accelerators, the on-chip interconnect the cores use to communicate gains importance. We beg...