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» Optimizing interconnection policies
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CASES
2005
ACM
13 years 11 months ago
Software-directed power-aware interconnection networks
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
Vassos Soteriou, Noel Eisley, Li-Shiuan Peh
GECCO
2009
Springer
124views Optimization» more  GECCO 2009»
14 years 3 months ago
Three interconnected parameters for genetic algorithms
When an optimization problem is encoded using genetic algorithms, one must address issues of population size, crossover and mutation operators and probabilities, stopping criteria...
Pedro A. Diaz-Gomez, Dean F. Hougen
ICPP
2000
IEEE
14 years 1 months ago
Multilayer VLSI Layout for Interconnection Networks
Current VLSI technology allows more than two wiring layers and the number is expected to rise in future. In this paper, we show that, by designing VLSI layouts directly for an L-l...
Chi-Hsiang Yeh, Emmanouel A. Varvarigos, Behrooz P...
VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
14 years 9 months ago
Interconnect Delay Minimization Using a Novel Pre-Mid-Post Buffer Strategy
We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer siz...
Vani Prasad, Madhav P. Desai
ISCAS
2003
IEEE
150views Hardware» more  ISCAS 2003»
14 years 2 months ago
Accurate rise time and overshoots estimation in RLC interconnects
A closed form expression for the rise time of a gate driving a distributed RLC line is introduced that is within 8% of dynamic circuit simulations for a wide range of RLC loads. I...
Noha H. Mahmoud, Yehea I. Ismail