2703 search results - page 65 / 541 » Optimizing memory transactions |
ISVLSI
2003
IEEE
14 years 2 months ago
2003
IEEE
The behavior of many algorithms is heavily determined by the input data. Furthermore, this often means that multiple and completely different execution paths can be followed, also...
PAKDD
2009
ACM
14 years 6 months ago
2009
ACM
Since mining frequent patterns from transactional databases involves an exponential mining space and generates a huge number of patterns, efficient discovery of user-interest-based...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
In this paper, a novel design space exploration approach is proposed that enables a concurrent optimization of the topology, the process binding, and the communication routing of ...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper presents a novel cycle-approximate performance estimation technique for automatically generated transaction level models (TLMs) for heterogeneous multicore designs. The...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...