2048 search results - page 237 / 410 » Optimizing pipelines for power and performance |
ASPDAC
1995
ACM
13 years 11 months ago
1995
ACM
In this paper we describe, a powerful post-synthesis approach called reclocking, for performance improvement by minimizing the total execution time. By back annotating the wire del...
DAC
2008
ACM
14 years 9 months ago
2008
ACM
In the design of complex power distribution networks (PDN) with multiple power islands, it is required that the PDN represents a low impedance as seen by the digital modules. This...
ISQED
2010
IEEE
13 years 6 months ago
2010
IEEE
Multiple use-case chip multiprocessor (CMP) applications require adaptive on-chip communication fabrics to cope with changing use-case performance needs. Networks-on-chip (NoC) ha...
MICRO
2002
IEEE
13 years 7 months ago
2002
IEEE
Power consumption and power density for the Translation Lookaside Buffer (TLB) are important considerations not only in its design, but can have a consequence on cache design as w...
WCNC
2010
IEEE
14 years 3 days ago
2010
IEEE
Abstract—In cognitive mobile multihop relay (CMMR) network, the mobile user as the primary user is allocated with the channel for transmitting data. Relay station as the secondar...