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» Optimizing pipelines for power and performance
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ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
13 years 12 months ago
Power-aware mapping for reconfigurable NoC architectures
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this paper. In most of the existing methods, mapping is carried out based on the traff...
Mehdi Modarressi, Hamid Sarbazi-Azad
DATE
2004
IEEE
118views Hardware» more  DATE 2004»
13 years 11 months ago
Distributed Multimedia System Design: A Holistic Perspective
Multimedia systems play a central part in many human activities. Due to the significant advances in the VLSI technology, there is an increasing demand for portable multimedia appl...
Radu Marculescu, Massoud Pedram, Jörg Henkel
JSAC
2010
194views more  JSAC 2010»
13 years 6 months ago
Burst communication by means of buffer allocation in body sensor networks: Exploiting signal processing to reduce the number of
Abstract—Monitoring human movements using wireless sensory devices promises to revolutionize the delivery of healthcare services. Such platforms use inertial information of their...
Hassan Ghasemzadeh, Vitali Loseu, Sarah Ostadabbas...
ICC
2009
IEEE
124views Communications» more  ICC 2009»
14 years 2 months ago
Distributed Interference Pricing for the MIMO Interference Channel
Abstract—We study distributed algorithms for updating transmit precoding matrices for a two-user Multi-Input/Multi-Output (MIMO) interference channel. Our objective is to maximiz...
Changxin Shi, David A. Schmidt, Randall A. Berry, ...
HIPC
2007
Springer
14 years 2 months ago
Self-optimization of Performance-per-Watt for Interleaved Memory Systems
- With the increased complexity of platforms coupled with data centers’ servers sprawl, power consumption is reaching unsustainable limits. Memory is an important target for plat...
Bithika Khargharia, Salim Hariri, Mazin S. Yousif