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MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
14 years 28 days ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...
MICRO
1995
IEEE
108views Hardware» more  MICRO 1995»
13 years 11 months ago
SPAID: software prefetching in pointer- and call-intensive environments
Software prefetching, typically in the context of numericor loop-intensive benchmarks, has been proposed as one remedy for the performance bottleneck imposed on computer systems b...
Mikko H. Lipasti, William J. Schmidt, Steven R. Ku...
DASFAA
2005
IEEE
256views Database» more  DASFAA 2005»
14 years 1 months ago
CoCache: Query Processing Based on Collaborative Caching in P2P Systems
Peer-to-peer (P2P) computing is gaining more and more significance due to its widespread use currently and potential deployments in future applications. In this paper, we propose ...
Weining Qian, Linhao Xu, Shuigeng Zhou, Aoying Zho...
CASES
2004
ACM
14 years 1 months ago
A post-compiler approach to scratchpad mapping of code
ScratchPad Memories (SPMs) are commonly used in embedded systems because they are more energy-efficient than caches and enable tighter application control on the memory hierarchy...
Federico Angiolini, Francesco Menichelli, Alberto ...
DATE
2005
IEEE
135views Hardware» more  DATE 2005»
14 years 1 months ago
Compositional Memory Systems for Multimedia Communicating Tasks
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...