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DAC
1998
ACM
14 years 11 months ago
A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
Nuno Alexandre Marques, Mattan Kamon, Jacob White,...
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
14 years 3 months ago
Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction
Assessing IC manufacturing process fluctuations and their impacts on IC interconnect performance has become unavoidable for modern DSM designs. However, the construction of parame...
Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, S...
IDA
2005
Springer
14 years 3 months ago
Combining Bayesian Networks with Higher-Order Data Representations
Abstract. This paper introduces Higher-Order Bayesian Networks, a probabilistic reasoning formalism which combines the efficient reasoning mechanisms of Bayesian Networks with the...
Elias Gyftodimos, Peter A. Flach
SCALESPACE
2005
Springer
14 years 3 months ago
Relations Between Higher Order TV Regularization and Support Vector Regression
We study the connection between higher order total variation (TV) regularization and support vector regression (SVR) with spline kernels in a one-dimensional discrete setting. We p...
Gabriele Steidl, Stephan Didas, Julia Neumann
DATE
2010
IEEE
149views Hardware» more  DATE 2010»
14 years 2 months ago
Efficient decision ordering techniques for SAT-based test generation
Model checking techniques are promising for automated generation of directed tests. However, due to the prohibitively large time and resource requirements, conventional model chec...
Mingsong Chen, Xiaoke Qin, Prabhat Mishra