64 search results - page 8 / 13 » Output-Determinacy and Asynchronous Circuit Synthesis |
ICCD
1997
IEEE
14 years 4 days ago
1997
IEEE
Asynchronous systems are being viewed as an increasingly viable alternative to purely synchronous systems. This paper gives an overview of the current state of the art in practica...
ICCAD
1999
IEEE
14 years 26 days ago
1999
IEEE
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
ICCAD
2003
IEEE
14 years 5 months ago
2003
IEEE
A new technique for the logic synthesis of asynchronous circuits is presented. It is based on the structural theory of Petri nets and integer linear programming. The technique is ...
ICCAD
1993
IEEE
14 years 21 days ago
1993
IEEE
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
VLSI
2005
Springer
14 years 2 months ago
2005
Springer
Quasi delay insensitive circuits are functionally independent of delays in gates and wires (except for some particular wires). Such asynchronous circuits offer high robustness but...