64 search results - page 9 / 13 » Output-Determinacy and Asynchronous Circuit Synthesis |
ASPDAC
1999
ACM
14 years 27 days ago
1999
ACM
DAC
2006
ACM
14 years 9 months ago
2006
ACM
A novel method to solve the state encoding problem in Signal Transition Graphs is presented. It is based on the structural theory of Petri nets and can be applied to large specifi...
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behavior. Asynchronous speed...
ACSD
2005
IEEE
14 years 2 months ago
2005
IEEE
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
DAC
1999
ACM
14 years 9 months ago
1999
ACM
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...