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ISCA
2008
IEEE
135views Hardware» more  ISCA 2008»
14 years 1 months ago
ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency
Process variations are poised to significantly degrade performance benefits sought by moving to the next nanoscale technology node. Parameter fluctuations in devices can introd...
Xiaoyao Liang, Gu-Yeon Wei, David Brooks
CGO
2006
IEEE
14 years 1 months ago
Constructing Virtual Architectures on a Tiled Processor
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
David Wentzlaff, Anant Agarwal
ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
14 years 1 months ago
An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors
Instruction set customization is an effective way to improve processor performance. Critical portions of application dataflow graphs are collapsed for accelerated execution on s...
Nathan Clark, Jason A. Blome, Michael L. Chu, Scot...
ISCA
2005
IEEE
81views Hardware» more  ISCA 2005»
14 years 1 months ago
Energy Optimization of Subthreshold-Voltage Sensor Network Processors
Sensor network processors and their applications are a growing area of focus in computer system research and design. Inherent to this design space is a reduced processing performa...
Leyla Nazhandali, Bo Zhai, Javin Olson, Anna Reeve...
ISPASS
2005
IEEE
14 years 1 months ago
Simulation Differences Between Academia and Industry: A Branch Prediction Case Study
Computer architecture research in academia and industry is heavily reliant on simulation studies. While microprocessor companies have the resources to develop highly detailed simu...
Gabriel H. Loh